Discover how an affordable Arduino Uno R3-based Disaster Management System can detect multiple hazards in real time using environmental sensors and automated emergency response. In this episode of The Semiconductor Webinar (TSW), we showcase an innovative embedded systems project that integrates flame detection, fire sensing, temperature monitoring, vibration sensing, water level monitoring, LCD alerts, buzzer notifications, and automatic water pump activation through a relay.
The session walks through the complete engineering journey—from identifying the real-world problem, selecting hardware components, designing the system architecture, programming the Arduino, integrating multiple sensors, debugging, calibration, testing, and validating the final prototype. You'll also learn about the challenges encountered during development and how they were overcome to build a reliable, low-cost disaster monitoring solution.
📌 What You'll Learn
✅ Arduino Uno R3 based Disaster Management System
✅ Flame, Fire, Temperature, Vibration & Water Level Detection
✅ Multi-Sensor Integration Techniques
✅ Relay Controlled Automatic Water Pump
✅ LCD & Buzzer Based Real-Time Alert System
✅ Embedded System Architecture & Working Principle
✅ Sensor Calibration, Debugging & Testing
✅ Practical IoT & Embedded Systems Project Development
About TSW (The Semiconductor Webinar):
TSW is a platform dedicated to showcasing emerging talent, innovative engineering projects, and industry knowledge in Embedded Systems, Electronics, VLSI, IoT, and Semiconductor Engineering.
In this session of The Semiconductor Webinar (TSW), we explore the design and verification of a fully synthesizable UART (Universal Asynchronous Receiver Transmitter) implemented entirely in Verilog HDL.
The webinar demonstrates the complete UART architecture, including:
✅ Baud Rate Generator
✅ UART Transmitter (TX)
✅ UART Receiver (RX)
✅ Modular and Synthesizable RTL Design
✅ Full-Duplex Communication Verification
A comprehensive Verilog testbench validates the design by instantiating two UART modules cross-connected across different clock domains (100 MHz and 50 MHz) while both operate at 9600 baud. The simulation showcases reliable simultaneous bidirectional data transfer, making it an excellent example of practical digital communication design and verification.
Whether you're a student, FPGA developer, ASIC engineer, or verification enthusiast, this webinar provides valuable insights into UART protocol implementation, RTL design practices, and simulation methodology.
🔹 Topics Covered
UART communication fundamentals
Baud rate generation
Transmitter and receiver architecture
Verilog RTL implementation
Cross-clock domain UART communication
Full-duplex verification using a testbench
Simulation results and waveform analysis
🎯 Who Should Watch?
Electronics & ECE Students
FPGA Developers
ASIC Design Engineers
RTL Design Engineers
Verification Engineers
Embedded System Developers
Semiconductor Enthusiasts
📌 About The Semiconductor Webinar (TSW)
TSW is an initiative to showcase emerging talent in the semiconductor ecosystem by providing a platform where engineers, researchers, students, and industry professionals share their knowledge, projects, and innovative ideas with the global semiconductor community.
👍 If you enjoyed this session, please Like, Share, and Subscribe to TechSimplifiedTV for more semiconductor tutorials, webinars, podcasts, and career guidance.
In this special session, we explore a groundbreaking Indian innovation in nanotechnology and LED research developed at Aryabhatta Knowledge University (AKU) , Patna.
The AKU Researchers Team led by Dr. Bibhuti Bikramaditya has invented a new functional nanomaterial based on Yttrium Aluminum Borate for next-generation LED applications.
This invention was developed as part of Dr. Bibhuti’s Ph.D research under the guidance of Dr. Rakesh Kumar Singh and co-guidance of Prof. R. K. Verma.
Key Highlights of this Nanomaterial:
✔ Non-lanthanide material with high coloring effect
✔ Rare earth element abundantly available in India
✔ Potential reduction in dependency on Chinese raw materials for LED manufacturing
✔ Suitable for both UV LEDs and visible LEDs
✔ Ultra-low operating voltage from 1.3V to 1.7V
✔ Potential reduction in sparkling effects harmful to the human retina
Guests's Bio:Dr. Bibhuti Bikramaditya:
Dr. Bibhuti Vikramaditya is an accomplished Product and R&D leader with over 23 years of experience spanning nanotechnology, VLSI (FPGA/ASIC), embedded systems, and hardware product development. A graduated incubatee of IIT Patna, he is the Director of SmartWay Electronics Pvt. Ltd., having secured funding from IIT Patna, the Department of Industry, Government of Bihar, and the Startup India Seed Fund. His research contributions include nano-electronics and nanomaterials for advanced LED devices, with a provisional patent filed and hands-on expertise across advanced characterization and nanotechnology tools. Beyond industry, Dr. Vikramaditya is the Founder of BiharBrains Development Society, a non-profit focused on building a research and innovation culture in Bihar, and the driving force behind the annual Bihar Science Conference, an international forum hosted with leading universities. He also serves as the Managing Editor of Manthan, an international peer-reviewed journal, reflecting his commitment to advancing scientific research, capacity building, and deep-tech ecosystem development in Eastern India.
Dr. Rakesh Kumar Singh:
Dr. Rakesh Kumar Singh is the head of the Department of School of Nanoscience & Nanotechnology, Aryabhatta Knowledge University, Patna. He started his teaching and research career at the age of about 25 year in year 2004 (after passing M.Sc-Physics in the year 2003) as Lecture of Physics, Patna Women’s College, Patna University. He guided/completed 14 Ph.D. theses, 45 M.Tech Research project theses and 18 UG Research project under College with Potential for excellence status, accorded by UGC & Basic Scientific Research (NAAC-A grade scheme) till Aug. 2021. He has published/ written research article about more than 100 in peer reviewed journals.
Prof. R. K. Verma:
Prof Ranjit K. Verma, FRSC(London) is the Founder Vice Chancellor of Munger University and a former Pro Vice Chancellor of Patna University, Patna. He superannuated as Professor of Inorganic and Analytical Chemistry from Magadh University and has been authoring popular science articles for media since 70’s. An author for chemistry textual materials and encyclopaedia chapter, he is also a former Hony. Editor of the Journal of Indian Chemical Society and, an Associate Editor of the Journal of Thermal Analysis and Calorimetry(Springer). His works on synthesis of smart nanoparticles and those on thermooxidative decomposition of edible oils are well acclaimed. Presently, he is also President of Indian Council of Chemists and General Secretary of Ind. Sci. Cong. Assoc.
Nishant Kumar :
Nishant Kumar is a Researcher and Technical Assistant at the Centre for Nanoscience & Nanotechnology, Aryabhatta Knowledge University, Patna, He earned his M.Tech in Nanoscience & Nanotechnology as a university topper from Aryabhatta Knowledge University and holds a B.Tech in Electrical & Electronics Engineering.
He has strong expertise in nanomaterial synthesis and advanced characterization techniques including XRD, SEM, FTIR, DLS, and TGA-DTA, and has contributed to more than 40 PG and Ph.D. research theses. His research interests span nanomaterials, nanoelectronics, nanomedicine, sensors, and environmental applications. He has authored over 50 SCI/Scopus-indexed publications, with an h-index of 19 and nearly 950 citations, and holds a granted patent on YAB-based nanomaterials for LED applications.
Nishant Kumar is also an IEEE member and has delivered invited talks and lectures on nanotechnology, nano-biotechnology, advanced materials, and emerging nanodevice applications at academic institutions and conferences. In addition, he has served as an Assistant Professor in an engineering college and actively contributes as a peer reviewer, researcher, and conference participant in the field of nanoscience and nanotechnology.
Running eSim Anywhere with Docker (Mac, Linux & Windows)
🎤 Guest & Presenter: Sumanto Kar
Docker installation :
🔹 What is eSim?
⚙️ A free and open-source Electronic Design Automation (EDA) tool (formerly Oscad/FreeEDA)
🧩 Integrated simulation environment built on tools like KiCad, Ngspice, GHDL, Verilator, and OpenModelica
🧪 Supports SkyWater SKY130 PDK for open-source chip design
📜 Released under the GNU GPL license
🔹 Focus of This Webinar
💻 In this session, we will demonstrate how Docker can simplify the installation and execution of eSim across multiple operating systems including MacOS, Linux, and Windows.
📦 Instead of complex toolchain setups, participants will learn how to run a ready-to-use eSim environment using containerization.
🔹 Why Attend?
🚀 Learn how Docker enables portable EDA environments across different operating systems
⚡ Avoid complicated installation steps and dependency issues
🖥️ Run eSim seamlessly on Mac, Linux, and Windows
📦 Understand how containerized EDA workflows support reproducible research and teaching
🎓 Ideal for students, educators, researchers, and hardware startups
🛠️ What Will Be Covered?
🐳 Introduction to Docker for EDA workflows
⚙️ Setting up a Docker-based eSim environment
💻 Running eSim on MacOS, Linux, and Windows using containers
📦 Managing simulation environments without dependency conflicts
🧪 Demonstration of running eSim simulations from a Docker container
📡 Best practices for portable semiconductor design environments
👥 Who Should Attend?
🎓 UG/PG Electronics Engineering Students (BSc/BTech/MSc/MTech/MS)
👨🏫 Faculty Members & Researchers
🔬 VLSI & Embedded Systems Enthusiasts
🧑🔧 Lab Instructors & Technical Staff
💡 Anyone interested in open-source semiconductor design tools
This TSW (The Semiconductor Webinar) goes beyond textbook crystal growth theory and focuses on how ingots are actually prepared in semiconductor fabs. We will discuss industrial-scale ingot preparation methods—why certain methods are chosen, what process trade-offs fabs care about, and how quality, yield, cost, and scalability drive real decisions.
The session is industry-oriented, covering practical insights into methods such as CZ, MCZ, FZ, and specialty approaches, with emphasis industry inclined topics, rarely explained in academic courses.
Designed for students, fresh graduates, and professionals aiming to work in fabs, this webinar bridges the gap between theory and manufacturing reality, helping you understand how upstream wafer decisions impact downstream device performance and yield.
Who should attend:
* Aspiring fab engineers & process engineers
* VLSI / semiconductor students preparing for industry roles
* Professionals transitioning from EDA/design to manufacturing
* Anyone who wants a fab-floor perspective, not textbook slides
If you want to understand how fabs think, not just how books explain—this session is for you.
Guests Bio :
1. Bhavesh Motwani :
Bhavesh Motwani is currently being enrolled in the MTech program in Semiconductor Technology at Nirma University. He is being trained as an intern at Monk9 Technology, where hands-on experience in semiconductor fabrication is being gained. His BTech degree in Electronics and Communication Engineering was completed at GEC Bharuch, affiliated with Gujarat Technological University.
His initial interest in the field of Electronics and Communication was sparked by work in robotics and embedded systems. Several projects were undertaken using platforms like MSP430, Arduino, and ESP boards. Through this exploration, deeper curiosity about the internal working of these systems was developed, eventually leading him toward the field of VLSI and semiconductors.
Due to limited lab access and software tools at his government college, Bhavesh was encouraged by a professor to pursue MTech at a reputed institution. At Nirma University, inspiration was drawn from Dr. N.M. Devashrayee, whose teaching in semiconductor fabrication and physics encouraged him to explore the domain in depth.
This interest marked the beginning of his journey into semiconductor fabrication, packaging, assembly, and testing. As India’s semiconductor ecosystem continues to expand, Bhavesh is determined to contribute meaningfully and aspires to take on a leadership role in advancing the industry.
Jayshree Adwani :
Jayshree Adwani is currently being enrolled in the second year of the MTech program in Semiconductor Technology at Nirma University. She is undergoing internship training at MONK9, with a focus on the semiconductor fabrication domain. Her interest in semiconductors was cultivated during her undergraduate studies in Electronics and Communication Engineering at Charusat University. A six-month internship was completed at VERIFAST Technologies, which later transitioned into a full-time role where she worked for one year in the verification domain.
While experience in verification and familiarity with communication protocols was gained, a stronger inclination toward fabrication was gradually developed. The ability to transform theoretical knowledge into physical semiconductor devices inspired her to pursue further studies focused on fabrication.
Throughout her MTech program, comprehensive knowledge has been acquired in semiconductor physics, cleanroom processes, and fabrication flow — covering wafer processing, device physics, and IC manufacturing. This hands-on exposure has deepened her passion and expertise in the field.
At Nirma University, Jayshree has also been actively involved in facilitating connections between academia and industry. Internship opportunities have been sought independently by her, both during and after her time at VERIFAST. She remains committed to contributing to India’s semiconductor growth and envisions herself playing a key role in this transformative industry.
Watch the webinar here :
A free and open-source EDA tool (formerly Oscad/FreeEDA)
Integrated Simulation Cockpit Built on top of tools like KiCad, Ngspice, GHDL, OpenModelica, Verilator, and more
Supports the SkyWater SKY130 PDK
Released under the GNU GPL license
Why Attend?
🔗 Experience mixed-signal simulation where analog meets digital.
💡 Discover eSim as a powerful open-source alternative to costly EDA tools.
📡 Learn how analog signals interact with digital logic in real-world systems like SoCs, ADC/DACs, and sensor interfaces.
🎓 Perfect for students, educators, startups, and researchers to bridge theory with hands-on practice.
🛠️ What Will Be Covered?
🛠️ Introduction to eSim mixed-signal simulation environment.
⚙️ Co-simulation using Ngspice (analog) + Verilator/GHDL (digital).
📝 Design flow:
📐 Analog schematics
💻 Digital HDL (Verilog, SystemVerilog, TL-Verilog, VHDL)
🎬 Running synchronized analog–digital simulations.
🚀 Applications: ADC/DAC design, sensor interfaces, mixed-signal SoCs, embedded systems.
🔍 Insights into continuous-time vs. event-driven domain interactions.
👥 Who Should Watch?
UG/PG Electronics Engineering Students (BSc/BTech/M.Sc/MTech/MS)
Faculty Members & Researchers
Lab Instructors & Technical Staff
Anyone seeking an open-source EDA solution
Important Links :
eSim Spoken Tutorial Forum: https://forums.spoken-tutorial.org/filter/eSim/
eSim Manual: https://static.fossee.in/esim/installation-files/eSim_Manual_2.5.pdf
eSim Downloads Page: https://esim.fossee.in/downloads
eSim Contact Us:https://esim.fossee.in/contact-us
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🎓 Students & Graduates curious about RISC-V, SoC design, and FPGA-based microcontrollers.
💼 Early-career professionals aiming to gain hands-on skills in RTL-to-bitstream flows using open-source tools.
🛠️ FPGA Engineers & Chip Designers exploring LiteX for automated SoC integration and deployment.
💡 Tech Enthusiasts & Makers eager to understand how the world’s smallest RISC-V CPU (SERV) works in practice.
📚 Educators & Researchers looking for practical teaching examples in open-source CPU and SoC design.
🔹 Why Attend?
🖥️ Learn RISC-V basics: the open-source CPU instruction set architecture.
⚙️ Discover SERV – the world’s smallest RISC-V CPU, ideal for MCU-class SoCs.
🛠️ Understand SoC design flows: manual RTL, vendor toolchains, and open-source frameworks.
🔗 Hands-on LiteX workflow: from Python-based SoC generation to FPGA deployment.
📟 Explore FPGA bitstream creation, UART/GPIO/Timer integration, and firmware execution.
🌍 Gain exposure to open-source collaboration, cost savings, and innovation opportunities.
Guests Bio : Anoushka Tripathi is introduced as a VLSI Engineer at Monk9Tech, India’s own semiconductor fab, where FPGA-based SoC design projects are being worked on. AryavartSemi was founded by her as an initiative to spread semiconductor awareness and to build a stronger tech community in India. Her internship was undertaken at DRDO SSPL, during which contributions were made to FPGA-based defense applications, strengthening hands-on expertise in system design. A vision to drive innovation in India’s semiconductor ecosystem is carried forward, with the aim of bridging advanced chip design with real-world impact.
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🎓 Students & Graduates exploring the world of digital logic design, RTL, and looking to build a career in VLSI and processor design.
💼 Early-career professionals eager to strengthen their Verilog and RTL simulation fundamentals.
🛠️ Engineers & Chip Designers wanting to deepen their knowledge in combinational logic and performance-driven shift operations.
💡 Tech Enthusiasts & Hobbyists interested in how efficient shift operations improve CPU and DSP speeds.
📚 Educators & Researchers seeking structured examples to teach advanced Verilog and computer architecture.
🔹 Why Attend?
📟 Basics of Microcontrollers and their role in IoT
🛠️ PCB fundamentals: layers, components, and terminologies
🔧 Key components like Atmega328p, CH340g chip, and ICSP headers
⚡ Power, communication, and programming interfaces
🖼️ Final PCB render and practical insights
Guests Bio : Swastik Dey is currently pursuing his M.Tech in VLSI Design from the Institute of Radio Physics and Electronics, Calcutta University. He holds a B.Tech degree in Electronics and Communication Engineering from Techno Main Saltlake, Maulana Abdul Kalam Azad University of Technology.
His academic interests include Embedded Systems, Internet of Things (IoT), and FPGA Systems, where he continues to explore innovative approaches to hardware and system design.
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In this episode of The Semiconductor Webinar (TSW), we dive into the efficient design and simulation of a 64-bit Barrel Shifter using Verilog.
A barrel shifter is a powerful combinational circuit that performs multi-bit shifts in a single clock cycle, crucial for high-speed data manipulation in:
Microprocessors and ALUs
DSP processors
Cryptographic engines
GPUs
Communication systems
Compilers and hardware accelerators
🚀 Key Highlights:
Difference between conventional and barrel shifters
Input/output signal architecture and control logic
Step-by-step breakdown using an 8-bit version for conceptual clarity
Scaling the design to 64-bit with a 6-bit shift amount logic
Simulation of three real-world test cases:
=> Left shift (27-bit)
=> Right shift (47-bit, logical)
=> Right shift (23-bit, arithmetic)
👥 Who Should Watch?
🎓 Students & Graduates exploring the world of digital logic design, RTL, and looking to build a career in VLSI and processor design.
💼 Early-career professionals eager to strengthen their Verilog and RTL simulation fundamentals.
🛠️ Engineers & Chip Designers wanting to deepen their knowledge in combinational logic and performance-driven shift operations.
💡 Tech Enthusiasts & Hobbyists interested in how efficient shift operations improve CPU and DSP speeds.
📚 Educators & Researchers seeking structured examples to teach advanced Verilog and computer architecture.
🔹Why Attend?
🧩 What Will Be Covered?
🌀 Understand Barrel Shifters from the Ground Up
Explore how barrel shifters perform multi-bit shifts in a single cycle — a must-have for high-speed data paths in CPUs, DSPs, GPUs, and cryptographic engines.
🔍 From 8-bit Concept to 64-bit Design
Learn the step-by-step logic construction, starting with an 8-bit design and scaling to a fully functional 64-bit shifter using Verilog HDL.
🧪 Hands-On Simulation of Real Cases
Walk through test cases including left shift, logical right shift, and arithmetic right shift with sign-bit control.
⚙️ Verilog for Performance-Oriented Digital Design
See how Verilog can model scalable and reusable RTL logic for hardware-efficient designs.
🚀 Build Skills That Scale
Master design patterns relevant to ALUs, arithmetic blocks, and embedded processing cores — essential in modern chip design workflows.
Guests Bio : Rachith H is currently in the third year of Electronics and Communication Engineering at Bapuji Institute of Engineering and Technology. A strong interest in VLSI, particularly front-end design and digital logic, is being pursued with dedication. The journey into RTL design, ASIC development, and open-source tools is being actively explored through self-learning to build a solid foundation for a future in chip design.Learning beyond the classroom is strongly valued, with practical knowledge being developed through hands-on experimentation and project work.
🎓 Students & Graduates curious about semiconductors and looking to build a future in VLSI, chip fabrication, or related fields.
💼 Early-career professionals aiming to deepen their technical knowledge and explore new opportunities in the semiconductor industry.
🛠️ Engineers & Designers interested in the latest trends in chip manufacturing, AI, 5G, and fabrication technologies.
💡 Tech Enthusiasts & Hobbyists wanting to understand how chips power modern devices and innovations.
📚 Educators & Researchers seeking fresh insights into semiconductor processes and career pathways.
🔹Why Attend? 🧩 What Will Be Covered?
🎁 Demystify Chip Packaging Go beyond silicon! Understand how raw dies are transformed into functional, robust, and compact packages ready for deployment in everything from smartphones to satellites.
🏗️ Peek Inside Packaging Processes Get behind-the-scenes insights into how packaging technologies enable performance, power, and protection.
🎓 Unlock Career & Innovation Paths Discover career roles in assembly, packaging R&D, reliability testing, and failure analysis — and how engineers can innovate in this space.
🚀Stay Industry-Ready With form factors shrinking and complexity rising, stay on top of cutting-edge packaging tech and its role in tomorrow’s electronics.
Guests Bio :
Bhavesh Motwani :
Bhavesh Motwani is currently being enrolled in the MTech program in Semiconductor Technology at Nirma University. He is being trained as an intern at Monk9 Technology, where hands-on experience in semiconductor fabrication is being gained. His BTech degree in Electronics and Communication Engineering was completed at GEC Bharuch, affiliated with Gujarat Technological University. His initial interest in the field of Electronics and Communication was sparked by work in robotics and embedded systems. Several projects were undertaken using platforms like MSP430, Arduino, and ESP boards. Through this exploration, deeper curiosity about the internal working of these systems was developed, eventually leading him toward the field of VLSI and semiconductors. Due to limited lab access and software tools at his government college, Bhavesh was encouraged by a professor to pursue MTech at a reputed institution. At Nirma University, inspiration was drawn from Dr. N.M. Devashrayee, whose teaching in semiconductor fabrication and physics encouraged him to explore the domain in depth. This interest marked the beginning of his journey into semiconductor fabrication, packaging, assembly, and testing. As India’s semiconductor ecosystem continues to expand, Bhavesh is determined to contribute meaningfully and aspires to take on a leadership role in advancing the industry.
Jayshree Adwani :
Jayshree Adwani is currently being enrolled in the second year of the MTech program in Semiconductor Technology at Nirma University. She is undergoing internship training at MONK9, with a focus on the semiconductor fabrication domain. Her interest in semiconductors was cultivated during her undergraduate studies in Electronics and Communication Engineering at Charusat University. A six-month internship was completed at VERIFAST Technologies, which later transitioned into a full-time role where she worked for one year in the verification domain. While experience in verification and familiarity with communication protocols was gained, a stronger inclination toward fabrication was gradually developed. The ability to transform theoretical knowledge into physical semiconductor devices inspired her to pursue further studies focused on fabrication. Throughout her MTech program, comprehensive knowledge has been acquired in semiconductor physics, cleanroom processes, and fabrication flow — covering wafer processing, device physics, and IC manufacturing. This hands-on exposure has deepened her passion and expertise in the field. At Nirma University, Jayshree has also been actively involved in facilitating connections between academia and industry. Internship opportunities have been sought independently by her, both during and after her time at VERIFAST. She remains committed to contributing to India’s semiconductor growth and envisions herself playing a key role in this transformative industry.
🎓 Students & Graduates curious about semiconductors and looking to build a future in VLSI, chip fabrication, or related fields.
💼 Early-career professionals aiming to deepen their technical knowledge and explore new opportunities in the semiconductor industry.
🛠️ Engineers & Designers interested in the latest trends in chip manufacturing, AI, 5G, and fabrication technologies.
💡 Tech Enthusiasts & Hobbyists wanting to understand how chips power modern devices and innovations.
📚 Educators & Researchers seeking fresh insights into semiconductor processes and career pathways.
🔹 Why Attend? 🛠️ What Will Be Covered?
🔧 Simplify Complex Tech
Break down the jargon! Learn semiconductor concepts in a way that’s easy to understand — whether you’re a student, a professional, or just curious.
🏭 Explore Real-World Chipmaking
Get behind-the-scenes insights into how chips are actually made — from silicon wafers to system-ready ICs.
🇮🇳 Understand India’s Chip Mission
Learn how India is shaping its place in the global semiconductor race and what it means for engineers, startups, and investors.
🎓 Unlock Career Paths
Discover exciting roles in VLSI design, fabrication, packaging, and testing — and learn how to enter this fast-growing field.
👥 Network & Interact
Engage with experts, ask questions, and connect with others who share your interest in the semiconductor revolution.
🚀 Stay Ahead of the Curve
With the industry evolving fast, this webinar helps you stay updated, skilled, and future-ready.
Guests Bio :
Bhavesh Motwani :
Bhavesh Motwani is currently being enrolled in the MTech program in Semiconductor Technology at Nirma University. He is being trained as an intern at Monk9 Technology, where hands-on experience in semiconductor fabrication is being gained. His BTech degree in Electronics and Communication Engineering was completed at GEC Bharuch, affiliated with Gujarat Technological University. His initial interest in the field of Electronics and Communication was sparked by work in robotics and embedded systems. Several projects were undertaken using platforms like MSP430, Arduino, and ESP boards. Through this exploration, deeper curiosity about the internal working of these systems was developed, eventually leading him toward the field of VLSI and semiconductors. Due to limited lab access and software tools at his government college, Bhavesh was encouraged by a professor to pursue MTech at a reputed institution. At Nirma University, inspiration was drawn from Dr. N.M. Devashrayee, whose teaching in semiconductor fabrication and physics encouraged him to explore the domain in depth. This interest marked the beginning of his journey into semiconductor fabrication, packaging, assembly, and testing. As India’s semiconductor ecosystem continues to expand, Bhavesh is determined to contribute meaningfully and aspires to take on a leadership role in advancing the industry.
Jayshree Adwani :
Jayshree Adwani is currently being enrolled in the second year of the MTech program in Semiconductor Technology at Nirma University. She is undergoing internship training at MONK9, with a focus on the semiconductor fabrication domain. Her interest in semiconductors was cultivated during her undergraduate studies in Electronics and Communication Engineering at Charusat University. A six-month internship was completed at VERIFAST Technologies, which later transitioned into a full-time role where she worked for one year in the verification domain. While experience in verification and familiarity with communication protocols was gained, a stronger inclination toward fabrication was gradually developed. The ability to transform theoretical knowledge into physical semiconductor devices inspired her to pursue further studies focused on fabrication. Throughout her MTech program, comprehensive knowledge has been acquired in semiconductor physics, cleanroom processes, and fabrication flow — covering wafer processing, device physics, and IC manufacturing. This hands-on exposure has deepened her passion and expertise in the field. At Nirma University, Jayshree has also been actively involved in facilitating connections between academia and industry. Internship opportunities have been sought independently by her, both during and after her time at VERIFAST. She remains committed to contributing to India’s semiconductor growth and envisions herself playing a key role in this transformative industry.
