VLSI Abbreviation & Glossary

 



A  

ACK - Acknowledgment

ADC - Analog to Digital Converter  

ADPLL - All Digital Phase-Locked Loop

AHDL - Analog Hardware Description Language

ASIC - Application-Specific Integrated Circuit  

ALU - Arithmetic Logic Unit  

AMS - Analog Mixed-Signal  

APT - Advanced Process Technology  

API - Application Programming Interface  

AFE - Analog Front End  

AI - Artificial Intelligence  

APB - Advanced Peripheral Bus

APD - Avalanche Photodiode  

APR - Automated Place and Route  

ARM - Advanced RISC Machine

ATPG - Automatic Test Pattern Generation

AXI - Advanced eXtensible Interface


B   


BCD - Binary Coded Decimal  

BCD - Bipolar CMOS DMOS

BJT - Bipolar Junction Transistor  

BGA - Ball Grid Array  

BSIM - Berkeley Short-channel IGFET Model  

BDD - Binary Decision Diagram  

BFS - Breadth-First Search  

BRAM - Block Random Access Memory 

BRAM - Batterypowerd RAM 

BTI - Bias Temperature Instability  

BIST - Built-In Self-Test  

BEOL = Back End Of Line



 

CAD - Computer-Aided Design  

CDM - Charged Device Model  

CDC - Clock Domain Crossing

CMOS - Complementary Metal-Oxide-Semiconductor  

CPU - Central Processing Unit  

CPLD - Complex Programmable Logic Device  

CPF - Common Power Format

CR - Critical Region  

CTS - Clock Tree Synthesis  

CLK - Clock  

CU - Copper Interconnect  

CVD - Chemical Vapor Deposition


  

DDR - Double Data Rate  

DRC - Design Rule Check  

DRAM - Dynamic Random Access Memory  

DUT - Device Under Test  

DFT - Design For Testability  

DFF - D Flip-Flop

DFM - Design For Manufacturing / Manufacturability

DSP - Digital Signal Processor  

DAC - Digital to Analog Converter 

DMA - Direct Memory Access

DPA - Differential Power Analysis  

DPI - Direct Programming Interface

DRC - Design Rule Check

DLT - Delay Locked Timing  

D-MOSFET - Depletion-Type MOSFET

DVS - Dynamic Voltage Scaling

DFS - Dynamic Frequency Scaling

DVFS - Dynamic Voltage and Frequency Scaling



  

EDA - Electronic Design Automation  

ECO - Engineering Change Order  

ESD - Electrostatic Discharge  

EDP - Energy Delay Product  

ETC - Equivalent Time Circuit  

EIF - Early Input Feedback  

EOS - Electrical Overstress  

ECO = Engineering Change Order 

EM - Electromigration

E-MOSFET - Enhancement-Type MOSFET



 F  

FIFO - First In First Out  

FPGA - Field Programmable Gate Array  

FSM - Finite State Machine  

FET - Field-Effect Transistor  

FLP - Flip Chip  

FSI - Front Side Interconnect  

FEOL = Front End Of Line

FDSOI = Fully Depleted Silicon On Insulator

FPU - Floating Point Unit




 G  

GDS - Graphic Data System  

GDSII - Graphic Database System II 

GPIB - General Purpose Interface Bus  

GPI - Generic Power Interface  

GPA - Gate Power Amplifier  

GND - Ground


 H  

HCI - Hot Carrier Injection

HDL = Hardware Description Language (Verilog / VHDL ) 

HLD - High-Level Design 

HDVL = Hardware Description & Verification Language (System Verilog)

HSPICE - High-Performance Simulation Program with Integrated Circuit Emphasis  

HTR - High-Temperature Reliability  

HEMT - High Electron Mobility Transistor

H.264 - Video Compression Standard


 I  

IC - Integrated Circuit  

IDE - Integrated Development Environment

I2C - Inter-Integrated Circuit

I2S - Inter-IC Sound

IBIS - Input Output Buffer Information Specification  

IPC - Interconnect Protocol Controller  

IP - Intellectual Property  

I/O - Input/Output

IIR - Infinite Impulse Response  


 J  

JTAG - Joint Test Action Group  

JEDEC - Joint Electron Device Engineering Council


 L  

LDO - Low Dropout Regulator

LLD - Low-Level Design

LNA - Low Noise Amplifier  

LVS - Layout Versus Schematic  

LO - Local Oscillator  


 M  

MCM - Multi-Chip Module

MUX - Multiplexer  

MOS - Metal Oxide Semiconductor  

MOST - Metal Oxide Semiconductor Transistor 

MOSFET - Metal Oxide Semiconductor Field Effect Transistor  

MPW - Multi-Project Wafer

MEOL = Middle End Of Line

Mask Layers: Each IC is manufactured with successive mask layers(10 – 15 layers).

MEMS - Micro Electro Mechanical Systems

ML - Machine Learning

MISO - Master In Slave Out

MSB - Most Significant Bit

MSV - Multiple Supply Voltages




 

NMOS - N-channel Metal Oxide Semiconductor  

NPT - Negative Power Transistor  

NBTI - Negative Bias Temperature Instability

NRE - Non-Recurring Engineering

NOR - Logical NOR Gate  

NOT - Logical NOT Gate


OA - Open Access

OASIS - Open Artwork System Interchange Standard

OTP - One Time Programmable  

OPA - Operational Amplifier  

OR - Logical OR Gate


 P 

PLL - Phase-Locked Loop  

PCB - Printed Circuit Board  

PMOS - P-channel Metal Oxide Semiconductor  

PMU - Power Management Unit

PDN = Power Delivery Network 

PD = Power Domain

PD = Physical Design 

PNR - Place aNd Route

PT - PrimeTime

PVT - Process, Voltage, and Temperature

PWM - Pulse Width Modulation



 

QDR - Quad Data Rate  


 R 

RAM - Random Access Memory  

ROM - Read Only Memory  

RTL - Register Transfer Level  


 S  

SD - Secure Digital

SDC - Synopsys Design Constraints

SDRAM - Synchronous Dynamic Random Access Memory

SI - Signal Integrity

SOC - System On Chip  

SOI - Silicon-On-Insulator

SPICE - Simulation Program with Integrated Circuit Emphasis

SRAM - Static Random Access Memory  

SERDES - Serializer/Deserializer 

SV - System Verilog 

STA - Staic Timing Analysis

STI = Shallow Trench Isolation 

SPI - Serial Peripheral Interface

SR - Set-Reset


 T 

TSV - Through Silicon Via  

TCL - Tool Command Language  

TDP - Thermal Design Power  


 U  

UART - Universal Asynchronous Receiver/Transmitter

UVLO - Under Voltage Lock Out  

ULSI - Ultra Large Scale Integration

USB - Universal Serial Bus  

UTSOI = Ultra-thin Silicon  On Insulator

UPF - Unified Power Format


 V  

VER - Verification

VGA - Video Graphics Array

VHDL - VHSIC Hardware Description Language

VIP - Verification Intellectual Property

VLSI - Very Large Scale Integration  

VCO - Voltage Controlled Oscillator  

VERA - Verification  

VCC - Voltage Common Collector

VCD - Value Change Dump


 W   

WLR - Wafer-Level Reliability  


 X  

XOR - Exclusive OR  

XILINX - FPGA Manufacturer


Y

YIN - Yield in Integrated Nodes  


 Z  

ZIF - Zero Insertion Force